On Demand

ESD Circuits (DD100)


Description
Abstract
This tutorial will focus on a number of clamp approaches including BigFETs or RC clamps, snap-back NFETs, diodes, SCRs including HV SCRs, low capacitance clamps methods including those for MOSFET based LNAs and RF transceiver switches, and cross domain clamping. Spice simulations and simple models where applicable will be used to design and analyze circuit performance. Models include HBM, CDM, and IEC sources, gate pull requirements for dynamically lowering snap-back thresholds, and diodes. Gate pull for snap-back NFETs will include cascade and stacked NFETs. The need for NQS MOSFET models will be discussed with respect to CDM simulations. Operational characteristics of diodes will be examined including simple models and turn on delay. Diode types to be examined include STI, gated, and gated with LDD block. Protecting RF transceiver switches will be studied and will include spice simulations and design of low capacitance snap-back NFETs. Cross domain analysis will feature SPICE-based gate oxide rupture models and design requirement for secondary clamps including secondary clamps for LNAs.

Learning Outcomes
The attendee will learn how to design BigFETs clamps, gate pull snap-back clamps, types of SCRs, and circuit protection networks. There will be an emphasis on circuit simulation for design and circuit models including failure mechanisms, tester models, pin interconnect parasitics, and diodes.
Content
  • ESD Circuits
Completion rules
  • All units must be completed