Description
Abstract
This course teaches basic ESD circuit design concepts and ideas required to design ESD protection for Charge Device Model ESD tests. The course covers a brief history of CDM ESD development, charge and discharge physics, characterization methods, CDM failures mechanisms, and CDM design-in strategies.
CDM ESD circuit design approaches and simulation setups for CDM failure debugging are presented in this tutorial on the basis of case studies. Insight into CDM circuit simulation requirements and physical aspects of the CDM ESD phenomenon that are important for reproducing the event with circuit simulation will be taught and modeling approaches for CDM specific device physical effects necessary for accurate circuit simulation will be introduced. This course also teaches methods for simplified CDM circuit simulations where detailed information is either not available or too complex to simulate.
The course focuses on what type of circuits fail during a CDM discharge event and teaches the different types of ESD design circuit strategies that can be applied to protect those circuits. This class covers basic to advanced topics for CDM ESD design, but the student is assumed to already have a basic understanding of the CDM test method.
Learning Outcomes
The attendees of this class are expected to have an improved understanding of the basics of charging of an IC component, CDM discharge event physical effects, internal circuit damages caused by the voltage and current during fast transient discharges and basic high current properties of ESD protection circuits in the CDM time domain. They should have an improved appreciation of circuit simulation methods for designing CDM ESD protection and for debugging failures caused by CDM ESD with circuit simulations. They should be able to apply ESD design strategies as discussed in the tutorial that have proven to protect ultra thin gate oxides of input circuitry and of devices connecting to signals that cross power domains techniques and strategies to protect cross domain circuits.
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